Vectorized and performance‐portable quicksort

Recent works showed that implementations of quicksort using vector CPU instructions can outperform the non-vectorized algorithms in widespread use. However, these are typically single-threaded, implemented for a particular instruction set, and restricted to small set key types. We lift three restrictions: our proposed vqsort algorithm integrates into state-of-the-art parallel sorter i p s 4 o $$ ip{s}^4o , with geometric mean speedup 1.59. The same implementation on seven sets (including SVE RISC-V V) across four platforms. It also supports floating-point 16–128 bit integer keys. To best knowledge, this is fastest sort large arrays non-tuple keys CPUs, up 20 times as fast sorting standard libraries. This article focuses practical engineering aspects enabling speed portability, which we have not yet seen demonstrated implementation. Furthermore, introduce compact transpose-free networks in-register arrays, vector-friendly pivot sampling strategy robust against adversarial input.